The present invention relates to a fault tolerant computer system, and more particularly to a fault tolerant computer system in which a boundary scan element is used as a communication element.
A computer for use in a monitoring system in a building, various data bases, a cash dispenser in a financial institution or the like requires nonstop, continuous processing for 24 hours or a predetermined time period.
A so-called fault tolerant computer system has been therefore proposed in order to avoid the suspension of the processing due to a fault of the computer or the like.
The fault tolerant computer system is the system in which the computer is duplicated or multiplexed and processing executed by a main computer is always made to be virtually executed by the other computer, whereby the other computer is caused to succeed to the processing when the main computer goes down. Therefore, according to this system, even when the main computer actually executing predetermined processing goes down, the processing is immediately continued by the other computer and thus the suspension of the processing can be avoided.
In such a fault tolerant computer system, what is important in order for the other computer to succeed to a series of processing without delay when the main computer goes down is as follows: the other computer quickly detects that the main computer has gone down, and discriminates the processing which has been executed when the main computer has gone down.
In this regard, a discriminating method using a watchdog timer, for example, has been heretofore suggested. This discriminating method using a watchdog timer is the method in which a signal is supplied from the main computer to the other computer at a fixed timing. As long as the signal is supplied to the other computer, the other computer recognizes that the main computer normally operates. When the signal is not supplied within a fixed time period, the other computer recognizes that the main computer has gone down, and thus succeeds to the processing.
However, if the discrimination is made in accordance with such a watchdog timer, a problem arises about an interval at which the signal is supplied. That is, when the signal is supplied at shorter intervals, the other computer can more quickly detect that the main computer is down, and more easily pinpoints the point at which the processing is suspended. However, the processing of supplying the signal or the like is performed more frequently and thus the processing to be originally executed by the computer is delayed. On the contrary, when the signal is supplied at longer intervals, the processing to be originally executed by the computer is not delayed. However, the other computer more slowly detects that the main computer is down, and less accurately determines the point at which the processing is suspended. Consequently, the other computer may fail to succeed to the processing.
Moreover, the processing for the watchdog timer is executed asynchronously with the processing which the computer should originally perform. From the beginning, it is thus difficult to accurately pinpoint the point where the processing is suspended.
It is therefore an object of the present invention to provide a fault tolerant computer system which can immediately detect that the main computer is down and which can accurately pinpoint the point where the processing is suspended, without delaying the processing which: the computer should originally execute.
Here, the inventor does not regard a boundary scan element for performing a wiring test for an electronic circuit substrate or an operation test for ICs on the substrate as the element only for a wiring connection check or the like. In other words, the inventor pays attention to the usefulness of the boundary scan element as a communication element for controlling various objects such as a CCD camera. Accordingly, the inventor has proposed a communication apparatus in which this boundary scan element is applied to the communication element (International Publication No. WO98/55925 and so on).
The inventor now uses the boundary scan element as the communication element in a fault tolerant computer system, thereby solving the above problem by the following means.
That is, according to the present invention, there is provided a fault tolerant computer system which has: a main computer; an auxiliary computer for normally virtually executing the same processing as that executed by the main computer; a communication element connected to an object; and switch means for switching connection between the communication element and either the main computer or the auxiliary computer, wherein the communication element is a boundary scan element, and the switch means switch the aforesaid connection in accordance with the presence or absence of a clock signal supplied from the main computer to the communication element.
According to these means, the switch means normally establish connection between the main computer and the communication element which is a boundary scan element, and the object is handled by the main computer. Various data communications between the main computer and the object are accomplished through the communication element, or the boundary scan element. Meanwhile, the auxiliary computer virtually executes quite the same processing as the processing which the main computer applies to the object.
When the main computer goes down, the main computer stops sending out the clock signal to the communication element. At this time, the switch means function so that the object may be processed by the auxiliary computer instead of the main computer. That is to say, the switch means break the connection between the main computer and the communication element, and establish connection between the auxiliary computer and the communication element.
This makes the auxiliary computer actually execute the processing for the object through the communication element. As a result, a series of processing for the object is avoided from being suspended.
By such functions, these means achieve the following specific effects.
First, whether or not the main computer is down is determined in accordance with the presence or absence of the clock signal supplied from the main computer to the communication element. The main computer and the auxiliary computer do not mutually determine whether or not the main computer is down. Thus, the processing which the main computer should originally execute is not delayed regardless of a cycle of the clock signal.
Second, the communication element which is a boundary scan element executes its processing in synchronization with the clock signal. Therefore, it is very easy to specify which processing the main computer was executing just before going down.
In the present invention, the main computer means a computer for normally executing the communication processing with the object. The auxiliary computer means a computer for replacing the main computer to execute the communication processing with the object when the main computer goes down. The above-stated phrase xe2x80x9cvirtually executing the same processingxe2x80x9d means that the auxiliary computer at least keeps track of the processing which is being executed by the main computer and the auxiliary computer is in a state where it can continue that processing as needed.
A combination of logic ICs, a programmable logic device (hereinafter referred to as PLD), or the like can be used as the switch means.
Description of the aforementioned boundary scan element in the present invention will here be preceded by the discussion on the prior art of the boundary scan element and the function thereof as a communication element.
FIG. 5(a) is a block diagram of a general boundary scan element 100. The boundary scan element 100 includes a package 110 containing input-side boundary cells 103 individually provided for input-side terminals 101, output-side boundary cells 104 individually provided for output-side terminals 102, TDI and TDO terminals 105 and 106 for inputting and outputting data to/from the boundary cells 103 and 104, a TAP circuit 107, a TCK terminal 108 for supplying the clock signal to the TAP circuit 107, and a TMS terminal 109 for supplying an operation mode switch signal to the TAP circuit 107.
The input-side and output-side boundary cells 103 and 104 are connected in series in chain together. The TDI and TDO terminals 105 and 106 are connected to the respective end cells of the boundary cells 103 and 104, respectively. Serial data inputted from the TDI terminal 105 can be set in all the boundary cells 103 and 104 by shifting the serial data through the boundary cells 103 and 104 in order. The data set in all the boundary cells 103 and 104 are shifted in order, whereby the data can also be sent out as serial data from the TDO terminal 106 to the outside.
The input-side boundary cells 103 can capture the data from the input-side terminals 101 and can output the set data to the input-side terminals 101. This also applies to between the output-side boundary cells 104 and the output-side terminals 102.
The TAP circuit 107 executes the predetermined processing associated with the boundary cells 103 and 104 in synchronization with the clock signal supplied from the TCK terminal 108 and in accordance with the operation mode switch signal supplied from the TMS terminal 109. For example, the TAP circuit 107 executes processing as follows: capturing data from the TDI terminal 105 and shifting or setting the same to the boundary cells 103 and 104 respectively; outputting the data set in the respective boundary cells 103 and 104 from the TDO terminal 106; and inputting/outputting data between the input-side terminals 101 and the input-side boundary cells 103 and inputting/outputting data between the output-side terminals 102 and the output-side boundary cells 104.
When a TCK line and a TMS line are very long, a TMS signal may be late for the clock signal. Therefore, as shown in FIG. 5(d), two TMS terminals 109 and two TCK terminals 108 can be provided so that one TMS terminal 109 and one TCK terminal 108 are used as the input-side terminals while the others are used as the output-side terminals. Here, the TMS signal and the clock signal are once captured and latched in the TAP circuit 107 and these signals are then outputted from the TAP circuit 107, whereby such a delay can be eliminated.
When the boundary scan element 100 is used as a communication element, for instance, the input-side terminals 101 are connected to input terminals of the objects of communication (the objects to be processed) and the output-side terminals 102 are connected to output terminals of the objects of communication. The TDI terminal 105, the TDO terminal 106, the TCK terminal 108 and the TMS terminal 109 are connected to a host computer.
The clock signal and the TMS signal are sent out from the host computer, whereby the TAP circuit 107 is caused to execute the predetermined processing and thus the data communication is performed between the host computer and the objects of communication. For example, control data are transmitted to the TDI terminal 105, the data are set in the input-side boundary cells 103, and furthermore the data are sent out from the input-side terminals 101 to the objects of communication, whereby the objects of communication are controlled. Alternatively, the data obtained or analyzed by the objects of communication are captured from the output-side terminals 102 into the output-side boundary cells 104, the data are outputted from the TDO terminal 106, and the data are received by the host computer.
In this manner, the boundary scan element 100 can function as the communication element.
Another example of the boundary scan element 100 may have the above-mentioned constitution of the boundary scan element 100 added with an RST terminal for supplying a reset signal to the TAP circuit 107, a bypass line for short-circuiting the TDI terminal 105 and the TDO terminal 106, an ID code register between the TDI terminal 105 and the TDO terminal 106, or the like.
In another example of the boundary scan element 100, as shown in FIG. 5(b), all input-side boundary cells 103xe2x80x2 and output-side boundary cells 104xe2x80x2 are not connected in series, and the boundary cells 103xe2x80x2 and 104xe2x80x2 are connected in parallel between a TDI terminal 105xe2x80x2 and a TDO terminal 106xe2x80x2. Here, the reference numerals of FIG. 5(b) correspond to those of FIG. 5(a).
In still another example of the boundary scan element 100, as shown in FIG. 5(c), input-side boundary cells 103xe2x80x3 and output-side boundary cells 104xe2x80x3 are connected in parallel. A TDI terminal 105xe2x80x3 and a TDO terminal 106xe2x80x3 are assigned to each of the boundary cells 103xe2x80x3 and 104xe2x80x3, respectively. An input-side terminal 101xe2x80x3 and an output-side terminal 102xe2x80x3 are connected to a TAP circuit 107xe2x80x3.
As described above, various boundary scan elements themselves have been proposed. Meanwhile, the present invention uses a boundary scan element as communication element and requires a clock signal. Thus, the boundary scan element of the present invention necessarily has at least boundary cells, a TAP circuit, a TCK terminal, and a TMS terminal. However, the above-described additional constitution, the method of connecting the boundary cells, the number of bits of the boundary cells and so on may be optionally selected.